I am senior in Electrical Engineering at Kansas State (Expected Graduation December 2015). I am actively looking for internship or Co-op position for year 2015.
My basic interests : Electronics , Wireless Communication , Digital Electronics
Electronics:
Op-amps , MOSFETs , BJTs , Diodes etc Semiconductor devices and little bit of PCB board layout designing. I have studied about different Amplifier configurations , Comparators , filters and other useful circuits.
Courses : ECE 526 (Electronics II) , ECE 502 (Electrical Laboratory)
Circuits Designed : Diode waveshaper , Triangle wave generator , Zero Crossing Detector , Square wave generator , Schimtt trigger, Window comparator
Final Projects : Sound Level Meter (ECE 526) , Low frequency signal generator
Wireless Communication: Antenna designing and design of Microwave circuits
Courses : ECE 764 (Design of Microwave Circuits)
Studying Concepts like : Antenna parameters , Dipole antennas , radio wave propagation , directional antennas , Microstrip PCB design techniques , Transferring impedance etc.
Final Project : Doplar radar operating in 5.8 GHz frequency band.
Courses : ECE 764 (Design of Microwave Circuits)
Studying Concepts like : Antenna parameters , Dipole antennas , radio wave propagation , directional antennas , Microstrip PCB design techniques , Transferring impedance etc.
Final Project : Doplar radar operating in 5.8 GHz frequency band.
Digital Systems:
Verilog and VHDL coding in ModelSim and Quartus using DE2 board (Cyclone II and Cyclone III family)
Courses : ECE 441 (Design of Digital Systems) , ECE 641 (Advanced Digital Design using HDLs)
Projects : Ripple carry Adder , Carry Look ahead Adder (VHDL) , Sequence Detector , Counter , LFSR , Internal Memory Controller (Verilog) , External Memory controller
Final Project : Pong Game
Personal Research Project : Implementation of DBPSK transceiver
Verilog and VHDL coding in ModelSim and Quartus using DE2 board (Cyclone II and Cyclone III family)
Courses : ECE 441 (Design of Digital Systems) , ECE 641 (Advanced Digital Design using HDLs)
Projects : Ripple carry Adder , Carry Look ahead Adder (VHDL) , Sequence Detector , Counter , LFSR , Internal Memory Controller (Verilog) , External Memory controller
Final Project : Pong Game
Personal Research Project : Implementation of DBPSK transceiver